Radiation Hardened/Tolerant and Cryogenic Temperature Electronics

We are developed CAD tools, models and methodologies for electronics design for circuit operation in extreme environments with a focus on very low temperature and radiation effects. These new tools and methodologies help enable NASA, and other researchers and companies to design next generation electronics. Such capabilities provide significant improvement in reliability, performance and lifetime of electronics that are used for space applications, including satellites and space travel. This is achieved through the development of novel physics-based modeling techniques and verified by experiment. The new cryogenic design tools greatly reduces the chances of error during actual circuit implementation, and thus reduces the number of design cycles, thereby substantially decreasing fabrication times and expenses. Models and CAD tools are relatively inexpensive as compared to fabrication costs, thus the results of this project provides a very large return on investment.


There has not been a significant effort to design electronics that operate reliably in outer space. Most of the electronics design software currently in use do not even give results for extreme temperature conditions. The details of the semiconductor physics that occur at cryogenic temperatures simply has not played a sufficiently large role in electronics design development to provide the existing knowledge base necessary for robust cryogenic development. The main difficulties with cryogenic design arise from changes in carrier mobilities, as well as the carrier freeze-out phenomena that occur at near absolute zero. These effects must be fully understood for modern devices, and incorporated accurately into electronic design tools.


Radiation damage that occurs in outer space also needs to be more fully worked into the design tool capabilities, especially for extreme temperature applications. Running numerous experiments in cryogenic chambers and in the presence of radiation emitting sources can help NASA alleviate this problem. However, experiments can not possibly be run for all devices, all circuits, for all applications and for all operating conditions. Instead, optimal development and use of design software must be employed to fill in gaps where exact experiments can not be performed for extreme environments.


Each semiconductor process of interest to NASA must be characterized and modeled for low temperature applications. We develop methodology and models for achieving this. To achieve the described characterization and model development, we take the following approach that involves experiment, detailed device modeling, compact device modeling and temperature consistent design:


  • Develop detailed device modeling capabilities for transient operation at cryogenic temperatures.
  • Develop detailed device modeling capabilities for AC (small signal) operation at cryogenic temperatures.
  • Develop AC and transient cryogenic device modeling for bulk and Silicon on Insulator (SOI) devices as well as SiGe.
  • Experimentally characterize bulk and SOI devices at low temperatures by performing cryogenic measurements.
  • Extract cryogenic compact models for bulk and SOI transistors.
  • Adapt compact models and import them into the circuit simulator SPICE to enable circuit design at cryogenic temperatures.
  • Characterize radiation effects in devices and incorporate them into device simulation and SPICE models.
  • Provide cryogenic simulations of key circuit blocks and compare the simulated results with those obtained on actual ICs.